1·These defects appear during crystal growth, but crystals having such defects are not considered usable for ic manufacture and are discarded .
这些缺陷在晶体生长时出现，有这类缺陷的晶体不能用于集成电路制造，应报废。
2·Due to the diversity of the faults and manufacturing defects in CMOS IC, some of the faults can neither be defected by voltage test nor by IDDQ test.
由于CMOS集成电路中的故障和制造缺陷是多种多样的，其中有些故障既不能被电压测试也不能被稳态电流测试方法检测出来。
3·Digital IC test content includes logic functional test, test of DC parameters and test of AC parameters.
数字集成电路测试内容包括逻辑功能测试、直流参数测试和交流参数测试。
4·Interconnect wire delay is a very important question that must to be resolved in deep submicron IC design.
深亚微米集成电路的互连线延迟是设计中需十分重视并必须解决的问题。
5·The paper gives the trimming technology's theory and realization in precision IC design, and sums up the advantage and disadvantage of methods.
介绍了高精度集成电路设计中修调技术的原理与多种实现方法，总结各种实现方法的优缺点。